Software Defined Radio (SDR) Methodology Based Multi–Core Software Platform

Abstract

This study considers and proposes the methodology for implementing a partially reconfigurable system as well as the basic infrastructures of the system requirements. This research methodology explores the use of Simulink®, Xilinx System Generator® and Lyrtech® for the implementation of Software Defined Radio (SDR), which is based on the digital transceiver design in the digital signal-processing module. The Design Methodology presents the proposed digital transceiver on a SFF SDR platform in three directions. The first approach, which is the simulation level, uses the Xilinx System Generator block and Lyrtech block. The second approach presents in detail the Hardware-in-the-loop (HIL) co-simulation design implementation on the Field-Programmable Gate Array (FPGA) hardware-modeling tool. The third approach describes the design in detail by using two task-based DSP and FPGA hardware. Design decisions such as dividing the tasks between FPGA and DSP, and choosing the appropriate methods to implement each block are made in order to optimize the usage of the resources on hardware. The modem is simulated using Simulink and System Generator for DSP to implement the FPGA blocks. Simulink and Real Time Workshop (RTW) are used to make individual modules for the DSP. TI Code Composer Studio compiles the DSP subsystems and combines different DSP modules.