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VHDL Implementation of Hybrid Block Cipher Method (SRC)

Engineering and Technology Journal, 2010, Volume 28, Issue 5, Pages 953-963
 

VHDL & FPGA Implementation of Max Membership Principle Based on Defuzzifier Unit

Journal of Al-Qadisiyah for Computer Science and Mathematics, 2016, Volume 8, Issue 1, Pages 125-136

FPGA Implementation of Mean – Max Membership basedDefuzzifier Unit

kirkuk university journal for scientific studies, 2015, Volume 10, Issue 3, Pages 79-91

Center of Sums based Defuzzifier Unit VLSI Architecture

Tikrit Journal of Pure Science, 2016, Volume 21, Issue 1, Pages 87-94

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